In the prior art, frame-transfer CCD imagers may in actuality be field-transfer imagers where a single frame of video signal samples consists of a plurality of interlaced fields of video signal samples rather than a single non-interleaved field of video signal samples. In this background of invention it will be assumed each frame is a single non-interlaced field, so that field and frame are synonymous, unless specification to the contrary is explicitly made.
A frame-transfer CCD imager comprises an image (or A) register, a frame storage (or B) register and an output line (or C) register. The image register is a plurality of CCD charge transfer channels disposed in parallel array in a surface of a semiconductive substrate. These charge transfer channels lie under gate electrodes to which static clocking signals are supplied during image integration times, when a radiant energy image is projected into the portion of the semiconductor substrate in which the parallel array of charge transfer channels is disposed. The radiant energy image generates charge carriers in a photoconversion process taking place in the image register portion of the semiconductor substrate, and these charge carriers are collected into charge packets in respective charge transfer stages of the CCD charge transfer channels of the image register, as defined by the static clocking signals. Conventionally, the image integration time extends over field trace intervals (or portions of them) in the raster-scanned video signa generated from the frame-transfer CCD imager output samples.
Frame transfer times intervene between successive integration times. These frame transfer times occur during the field retrace intervals of the rasterscanned video signal generated from the CCD imager output signal samples. During frame transfer times, the gate electrodes overlying the parallel array of CCD charge transfer channels have dynamic clocking signals applied to them. This causes the transfer of successive rows of charge packets from the output ends of the CCD charge transfer channels in the image register to the input ends of CCD charge transfer channels in the frame-storage register.
The frame-storage register comprises a plurality of CCD charge transfer channels disposed in parallel array on the semiconductive substrate. During a field transfer time the gate electrodes overlying these charge transfer channels, like the gate electrodes overlying the charge transfer channels of the image register, have dynamic clocking signal voltages applied to them that change at relatively fast clock rate applied to them. So all the charge packets descriptive of the energies of respective radiant energy image elements, which had been accumulated in the image register during the previous image integration time, are transferred to respective charge transfer stages in the frame-storage register.
During the succeeding field trace interval, the frame-storage register is forward clocked at relatively slow clock rate to advance rows of charge packets in its charge transfer channels, by one charge transfer stage each line retrace interval. The row of charge packets transferred from the output ends of the charge transfer channels of the frame-storage register load, in parallel, the successive charge transfer stages in the output line register. During line retrace intervals the output line register is operated as a CCD shift register clocked at pixel scan rate to deliver the row of charge packets serially to a charge sensing stage. The charge sensing stage generates samples of a raster-scanned video signal responsive to respective ones of these charge packets.
The transfer of rows of charge packets from the image register of a frame-transfer type imager to its frame-storage register by transferring each row of charge packets in parallel, from the output ends of the charge transfer channels in the image-register into the successive charge transfer stages of a further CCD line register, and thence into the input ends of the charge transfer channels in the frame storage register has been previously described by others. Those persons who have used a further CCD line register between the image register and frame storage registers have (as far as is known by the inventor) used it as an output line register. This further output line register permits scanning the image field in reverse line order, for example.
This further output line register has also been used to read out a row of charge packets descriptive only of transfer smear as generated by overclocking lhe image register, or of a row of charge packets descriptive only of transfer smear plus dark current as generated in a portion of the image register masked from irradiation of the radiant energy image. This has been done as a preliminary step in arrangements for compensating against transfer smear in the imager output signal.
At a time before dynamic metal-oxidesemiconductor transistor memories were perfected, CCD arrays were contemplated for use as serial memories for computers. A parallel array of CCD charge transfer channels was provided with a CCD input line register arranged for loading their input ends from respective ones of its successive charge transfer stages. Charge packets, originally serially generated, were transferred into the line register during shift register operation and then transferred out in parallel. The parallel array of CCD charge transfer channels was provided a CCD output line register for unloading charge packets from their output ends in parallel to be converted back to serial format. While the charge packets in these serial memories contained bit information, similar serial memory architecture can be used with charge packets describing analog signal samples.
The present inventor points out that the frame-storage memory in a frame-transfer type of CCD imager that has one CCD line register at the input ends of its charge transfer channels and has another CCD line register at their output ends can be operated as such a serial memory for analog signal samples. Further, the sample data in the rows of charge packets read serially from the line register at one end of the frame-storage register can be used to generate charge packets descriptive of sample data that can be read serially into the line register at the other end of the frame-storage memory to rewrite the frame-storage memory as it is being read. More particularly, read-out of the frame-storage register can be carried out on a non-destructive basis, in sharp contrast to prior art practice. Selectively reading out from the frame-storage register permits a variety of imager operational modes not previously possible.
For example, this new frame-transfer type of CCD imager can prevent certain artifacts of motion from occurring on moving vertical edges in television cameras using line interlace in alternate fields. Frame transfers can be made during alternate field retrace intervals. The frame-storage register can be read out twice in successive field trace intervals. During the field trace interval when the first read-out from the frame storage register is made, a first of two sets of alternate lines of video signal samples can be selected for retiming at a halved sample rate, to supply the basis for generation of a continuous video signal in the line trace portions of that field trace interval. During the field trace interval when the second read-out from the frame storage register is made, the second set of alternate lines of video signal samples can be selected for retiming at the halved sample rate, to supply the basis for generation of continuous video signal in the line trace portions of that field trace interval.
This new frame-transfer type of CCD imager can be used to effectuate trade-offs between image resolution and camera sensitivity to radiant energy. One can reread the frame-storage register several times, to keep flicker imperceptible, while sacrificing resolution of moving objects, to allow more field trace intervals over which to accumulate charge packets generated by photoconversion of radiant energy image elements. The sensitivity of the imager increases in direct proportion to increase in the image integration time, presuming there is no filling of the CCD charge transfer channel wells to overflowing.
Non-destructive read-out of the frame-storage register is preferably carried out entirely in the charge domain, without having to convert charge packets to voltage samples and to convert the voltage samples back into charge packets. This can be done using floating-gate electrometers. But lower-noise read out can be achieved using a floating-diffusion electrometer similar to that described by P. A. Levine in his U.S. patent application Ser. No. 729,651, filed May 2, 1985, entitled "TAPPED CCD DELAY LINE WITH NON-DESTRUCTIVE CHARGE SENSING FLOATING DIFFUSIONS", and assigned to RCA Corporation.